tag:blogger.com,1999:blog-6264947694886887540.post8649787324021715131..comments2024-03-27T22:51:35.227-07:00Comments on Ken Shirriff's blog: Reverse-engineering the standard-cell logic inside a vintage IBM chipKen Shirriffhttp://www.blogger.com/profile/08097301407311055124noreply@blogger.comBlogger5125tag:blogger.com,1999:blog-6264947694886887540.post-66062358460551833542023-10-08T21:25:26.213-07:002023-10-08T21:25:26.213-07:00The 63F7704 is the 'Spyglass' - Replaced l...The 63F7704 is the 'Spyglass' - Replaced later by the 'Pinegrove' and 'Pinegrove Shrink' (your other Token-Ring adapter article).IBMMuseumhttps://www.blogger.com/profile/11504529125337742158noreply@blogger.comtag:blogger.com,1999:blog-6264947694886887540.post-22180956954807507012021-04-06T09:44:31.639-07:002021-04-06T09:44:31.639-07:00Fascinating information and great post. The next l...Fascinating information and great post. The next level engineering is something most people don't expect from that period but this article shows that clearly. Thanks for revealing that to us.Unknownhttps://www.blogger.com/profile/08349062750571961627noreply@blogger.comtag:blogger.com,1999:blog-6264947694886887540.post-25586991280088457442021-04-03T10:48:09.301-07:002021-04-03T10:48:09.301-07:00Just started this read and right at the point 3 th...Just started this read and right at the point 3 the IBM logo is mentioned and I would like to share what I saw the other day in Red Hat office.<br /><br />KR<br />P<br /><br />https://www.dropbox.com/s/ulxnb5bguffxyeh/We_are_RH.jpg?dl=0Panehttps://www.blogger.com/profile/12120664044006188394noreply@blogger.comtag:blogger.com,1999:blog-6264947694886887540.post-7361162317908163972021-03-10T08:12:32.640-08:002021-03-10T08:12:32.640-08:00I wonder why the metal contacts for Vdd and groun...I wonder why the metal contacts for Vdd and ground are so much wider than the internal metal wiring used in the gates? Seems like it couldn't be much gain resistance wise at least.Toivo Henningssonhttps://www.blogger.com/profile/05599157383718975426noreply@blogger.comtag:blogger.com,1999:blog-6264947694886887540.post-83409032102647836352021-03-10T08:09:48.022-08:002021-03-10T08:09:48.022-08:00Nice article!
I'm sure that there's a huge...Nice article!<br />I'm sure that there's a huge difference between the density of custom layout vs standard cell layout (and between different standard cell methodologies as well, it seems).<br /><br />But your example of custom layout is from the 8086, which is an NMOS chip, unlike this chip, which is CMOS. I believe that the constraint that you have in CMOS to keep NMOS and PMOS transistors separated (while you need both in all gates) makes it harder to squeeze the logic together as tightly as in CMOS. Have you seen any tight custom layout CMOS chips?Toivo Henningssonhttps://www.blogger.com/profile/05599157383718975426noreply@blogger.com