The unusual bootstrap drivers inside the 8086 microprocessor chip

The 8086 microprocessor is one of the most important chips ever created; it started the x86 architecture that still dominates desktop and server computing today. I've been reverse-engineering its circuitry by studying its silicon die. One of the most unusual circuits I found is a "bootstrap driver", a way to boost internal signals to improve performance.1

The bootstrap driver circuit from the 8086 processor.

This circuit consists of just three NMOS transistors, amplifying an input signal to produce an output signal, but it doesn't resemble typical NMOS logic circuits and puzzled me for a long time. Eventually, I stumbled across an explanation:2 the "bootstrap driver" uses the transistor's capacitance to boost its voltage. It produces control pulses with higher current and higher voltage than otherwise possible, increasing performance. In this blog post, I'll attempt to explain how the tricky bootstrap driver circuit works.

A die photo of the 8086 processor. The metal layer on top of the silicon is visible. Around the edge of the chip, bond wires provide connections to the chip's external pins. Click this image (or any other) for a larger version.

NMOS transistors

The 8086 is built from MOS transistors (MOSFETs), specifically NMOS transistors. Understanding the bootstrap driver requires some understanding of these transistors. If you're familiar with MOSFETs as components, they have source and drain pins and current flows from the drain to the source, controlled by the gate pin. Most of the time I treat an NMOS transistor as a digital switch between the drain and the source: a 1 input turns the transistor on, closing the switch, while a 0 turns the transistor off. However, for the bootstrap driver, we must consider the MOSFET in a bit more detail.

A MOSFET switches current from the drain to the source, under control of the gate.

The important aspect of the gate is the difference between the gate voltage and the (typically lower) source voltage; this is denoted as V_gs. Without going into semiconductor physics, a slightly more accurate model is that the transistor turns on when the voltage between the gate and the source exceeds the fixed threshold voltage, V_th. This creates a conducting channel between the transistor's source and drain. Thus, if V_gs > V_th, the transistor turns on and current flows. Otherwise, the transistor turns off and no current flows.

The voltage between the gate and the source (V_gs) controls the transistor.

The threshold voltage has an important consequence for a chip such as the 8086. The 8086, like most chips of that era, used a 5-volt power supply. The threshold voltage depends on manufacturing characteristics, but I'll use 1 volt as a typical value.3 The result is that if you put 5 volts on the drain and on the gate, the transistor can pull the source up to about 4 volts, but then V_gs falls to the threshold voltage and the transistor stops conducting. Thus, the transistor can't pull the source all the way up to the 5-volt supply, but falls short by a volt on the output. In some circumstances this is a problem, and this is the problem that the bootstrap driver fixes.

Due to the threshold voltage, the transistor doesn't pull the source all the way to the drain's voltage, but "loses" a volt.

If you get a transistor as a physical component, the source and drain are not interchangeable. However, in an integrated circuit, there is no difference between the source and the drain, and this will be important.4 The diagram below shows how a MOSFET is constructed on the silicon die. The source and drain consist of regions of silicon doped with impurities to change their property. Between them is a channel of undoped silicon, which normally does not conduct. Above the channel is the gate, made of a special type of silicon called polysilicon. The voltage on the gate controls the conductivity of the channel. A very thin insulating layer separates the gate from the channel. As a side effect, the insulating layer creates some capacitance between the gate and the underlying silicon.

Diagram of an NMOS transistor in an integrated circuit.

Basic NMOS circuits

Before getting to the bootstrap driver, I'll explain how a basic inverter is implemented in an NMOS chip like the 8086. The inverter is built from two transistors: a normal transistor on the bottom, and a special load transistor on top that acts like a pull-up resistor, providing a small constant current.5 With a 1 input, the lower transistor turns on, pulling the output to ground to produce a 0 output. With a 0 input, the lower transistor turns off and the current from the upper transistor drives the output high to produce a 1 output. Thus, the circuit implements an inverter: producing a 1 when the input is 0 and vice versa.

A standard NMOS inverter is built from two transistors. The upper transistor is a "depletion load" transistor.

The disadvantage of this inverter circuit is that when it produces a 0 output, current continuously flows through the load transistor and the lower transistor to ground. This wastes power, leading to high power consumption for NMOS circuitry. (To solve this, CMOS circuitry took over in the 1980s and is used in modern microprocessors.) This also limits the current that the inverter can provide.

If a gate needs to provide a relatively large current, for instance to drive a long bus inside the chip, a more complex circuit is used, the "superbuffer". The superbuffer uses one transistor to pull the output high and a second transistor to pull the output low.6 Because only one transistor is on at a time, a high-current output can be produced without wasting power. There are two disadvantages of the superbuffer, though. First, the superbuffer requires an inverter to control the high-side transistor, so it uses considerably more space on the die. Second, the superbuffer can't pull the high output all the way up; it loses a volt due to the threshold voltage as described earlier.

Combining two output transistors with an inverter produces a higher-current output, known as a superbuffer.

The bootstrap driver

In some circumstances, you want both a high-current output, and the full output voltage. One example is connecting a register to an internal bus. Since the 8086 is a 16-bit chip, it uses 16 transistors for the bus connection. Driving 16 transistors in parallel requires a fairly high current. But the bus transistors are "pass" transistors, which lose a volt due to the threshold voltage, so you want to start with the full voltage, not already down one volt. To provide both high current and the full voltage, bootstrap drivers are used to control the buses, as well as similar tasks such as ALU control.

The concept behind the bootstrap driver is to drive the gate voltage significantly higher than 5 volts, so even after losing the threshold voltage, the transistor can produce the full 5-volt output.7 The higher voltage is generated by a charge pump, as illustrated below. Suppose you charge a capacitor with 5 volts. Now, disconnect the bottom of the capacitor from ground, and connect it to +5 volts. The capacitor is still charged with 5 volts, so now the high side is at +10 volts with respect to ground. Thus, a capacitor can be used to create a higher voltage by "pumping" the charge to a higher level.

On the left, the "flying capacitor' is charged to 5 volts. By switching the lower terminal to +5 volts, the capacitor now outputs +10 volts

The idea of the bootstrap driver is to attach a capacitor to the gate and charge it to 5 volts. Then, the low side of the capacitor is raised to 5 volts, boosting the gate side of the capacitor to 10 volts. With this high voltage on the gate, the threshold voltage is easily exceeded and the transistor can pass the full 5 volts from the drain to the source, producing a 5-volt output.

With a large voltage on the gate, the threshold voltage is exceeded and the transistor remains on until the source reaches 5 volts.

In the 8086 bootstrap driver,8 an explicit capacitor is not used.9 Instead, the transistor's inherent capacitance is sufficient. Due to the thin insulating oxide layer between the gate and the underlying silicon, the gate acts as the plate of a capacitor relative to the source and drain. This "parasitic" capacitance is usually a bad thing, but the bootstrap driver takes advantage of it.

The diagrams below show how the bootstrap driver works. Unlike an inverter, the bootstrap driver is controlled by the chip's clock, generating an output only when the clock is high. In the first diagram, we assume that the input is a 1 and the clock is low (0). Two things happen. First, the inverted clock turns on the bottom transistor, pulling the output to ground. Second, the 5V input passes through the first transistor; the left side of the transistor acts as the drain and the right side as the source. Due to the threshold voltage, a volt is "lost" so about 4 volts reaches the gate of the second transistor. Since the source and drain of the second transistor are at 0 volts, the gate capacitors are charged with 4 volts. (Recall that these are not explicit capacitors, but are parasitic capacitors.)

The first step in the operation of the bootstrap driver. The gate capacitance is charged by the input.

In the next step, the clock switches state and things become more interesting. The second transistor is on due to the voltage on the gate, so current flows from the clock to the output. In a "normal" circuit, the output would rise to 4 volts, losing a volt due to the threshold voltage of the second transistor. However, as the output voltage rises, it boosts the voltage on the gate capacitors and thus raises the gate voltage. The increased gate voltage allows the output voltage to rise above 4 volts, pushing the gate voltage even higher, until the output reaches 5 volts.10 Thus, the bootstrap driver produces a high-current output with the full 5 volts.

The second step in the operation of the bootstrap driver. As the output rises, it boosts the gate voltage even higher.

An important factor is that the first transistor now has a higher voltage on the right than on the left, so the source and drain switch roles. Since the transistor has 5 volts on the gate and on the (now) source, V_gs is 0 and current can't flow. Thus the first transistor blocks current flow from the gate, keeping the gate at its higher voltage. This is the critical role of the first transistor in the bootstrap driver, acting as a diode to block current flow out of the gate.

The diagram below shows what happens when the clock switches state again, assuming a low input. Now the first transistor's source voltage drops, making V_gs large and turning the transistor on. This allows the second transistor's gate voltage to flow out. Note that the first transistor is no longer acting as a diode, since current can flow in the "reverse" direction. The other important action in this clock phase is that the bottom transistor turns on, pulling the output low. These actions discharge the gate capacitance, preparing it for the next bootstrap cycle.

When the clock switches off, the driver is discharged, preparing it for the next cycle.

The 8086 die

Now that I've explained the theory, how do bootstrap drivers appear on the silicon die of the 8086? The diagram below shows six drivers that control the ALU operation.11 There's a lot happening in this diagram, but I'll try to explain what's going on. For this photo, I removed the metal layer with acid to reveal the silicon underneath; the yellow lines show where the metal wiring was. The large pinkish regions are doped silicon, while the gray speckled lines are polysilicon on top. The greenish and reddish regions are undoped silicon, which doesn't conduct and can be ignored. A transistor is formed where a polysilicon line crosses silicon, with the source and drain on opposite sides. Note that some transistors share the source or drain region with a neighboring transistor, saving space. The circles are vias, connections between the metal and a lower layer.

Six bootstrap drivers as they appear on the chip.

The drivers start with six inputs at the right. Each input goes through a "diode" transistor with the gate tied to +5V. I've labeled two of these transistors and the other four are scattered around the image. Next, each signal goes to the gate of one of the drive transistors. These six large transistors pass the clock to the output when turned on. Note that the clock signal flows through large silicon regions, rather than "wires". Finally, each output has a pull-down transistor on the left, connecting it to ground (another large silicon region) under control of the inverted clock. The drive transistors are much larger than the other transistors, so they can provide much more current. Their size also provides the gate capacitance necessary for the operation of the bootstrap driver.

Although the six drivers in this diagram are electrically identical, each one has a different layout instead of repeating the same layout six times. This demonstrates how the layout has been optimized, moving transistors around to use space most efficiently.

In total, the 8086 has 81 bootstrap drivers, mostly controlling the register file and the ALU (arithmetic-logic unit). The die photo below shows the location of the drivers, indicated with red dots. Most of them are in the center-left of the chip, between the registers and ALU on the left and the control circuitry in the center.

The 8086 die with main functional blocks labeled. The bootstrap drivers are indicated with red dots.

Conclusions

For the most part, the 8086 uses standard NMOS logic circuits. However, a few of its circuits are unusual, and the bootstrap driver is one of them. This driver is a tricky circuit, depending on some subtle characteristics of MOS transistors, so I hope my explanation made sense. This driver illustrates how Intel used complex, special-case circuitry when necessary to get as much performance from the chip as possible.

If you're interested in the 8086, I wrote about the 8086 die, its die shrink process and the 8086 registers earlier. I plan to write more about the 8086 so follow me on Twitter @kenshirriff or RSS for updates.

Notes and references

1. Intel used a "bootstrap load" circuit in the 4004 and 8008 processors. The bootstrap load has many similarities to the bootstrap driver, using capacitance to boost the output voltage. But it is a different circuit, used in a different role. The bootstrap load was designed for PMOS circuits to boost the voltage from a pull-up transistor, using explicit capacitors, built with a process invented by Federico Faggin. I wrote about the bootstrap load here. ↩

2. The only explanation of a bootstrap driver that I could find is in section 2.3.1 of DRAM Circuit Design: A Tutorial. The 8086 transistors with the gate wired to +5V puzzled me for the longest time. It seemed to me that this transistor would always be on, and thus had no function. However, the high voltage of the bootstrap driver gives it a function. I was randomly reading the DRAM book and suddenly recognized that one of the circuits in that book was similar to the mysterious 8086 circuit. ↩

3. The threshold voltage was considerably higher for older PMOS transistors. To get around this, old chips used considerably higher supply voltages, so "losing" the threshold voltage wasn't as much of a problem. For instance, the Intel 4004 used a 15-volt supply. ↩

4. The reason that MOSFETs are symmetrical in an integrated circuit and asymmetrical as physical components is that MOSFETs really have four terminals: source, gate, drain, and the substrate (the underlying silicon on which the transistor is constructed). In component MOSFETs, the substrate is internally connected to the source, so the transistor has three pins. However, the source-substrate connection creates a diode, making the component MOSFET asymmetrical. Four-terminal MOSFETs such as the 3N155 exist but are rare. The MOnSter 6502 made use of 4-terminal MOSFET modules to implement the 6502's pass transistors. ↩

5. The load transistor is a special type of transistor, a depletion transistor that is doped differently. The doping produces a negative threshold voltage, so the transistor remains on and provides a relatively constant current. See Wikipedia for more on depletion loads. ↩

6. The superbuffer has some similarity with a CMOS gate. Both use separate transistors to pull the signal high or low, with only one transistor on at a time. The difference is that CMOS uses a complementary transistor, i.e. PMOS, to pull the signal high. PMOS performs better in this role than NMOS. Moreover, a PMOS transistor is turned on by a 0 on the gate. This behavior eliminates the need for the inverter in a superbuffer. ↩

7. The 8086 processor also uses completely different charge pumps to create a negative voltage for a substrate bias. I discuss that use of charge pumps here. ↩

8. Why is it called a bootstrap driver? The term originates with footwear: boots often had boot straps on the top, physical straps to help pull the boots on. In the 1800s, the saying "No man can lift himself by his own boot straps" was used as a metaphor for the impossibility of improvement solely through one's own effort. (Pulling on the straps on your boots superficially seems like it should lift you off the ground, but is of course physically impossible.) By the mid-1940s, "bootstrap" was used in electronics to describe a circuit that started itself up through positive feedback, metaphorically pulling itself up by its bootstraps. The bootstrap driver continues this tradition, pulling itself up to a higher voltage. ↩

9. Some circuits in the 8086 use physical capacitors on the die, constructed from a metal layer over silicon. The substrate bias generators use relatively large capacitors. There are also some small capacitors that appear to be used for timing reasons. ↩

10. The exact voltage on the gate will depend on the relative capacitances of different parts of the circuit, but I'm ignoring these factors. The voltages that I show in the diagram are illustrations of the principle, not accurate values. ↩

11. Some of the 8086's bootstrap drivers pre-discharge when the clock is low and produce an output when the clock is high, while other drivers operate on the opposite clock phases. The ALU drivers in the die photo operate on the opposite phases, but I've labeled the diagram to match the previous discussion. ↩

Reverse-engineering a 1960s cordwood flip flop module with X-ray CT scans

How can you find out what's inside a sealed electronics module from the 1960s? In this blog post, I reverse-engineer an encapsulated flip flop module that was used for ground-testing of equipment from the Apollo space program. These modules are undocumented1, so their internal circuitry is a mystery. Thanks to Lumafield, I obtained a three-dimensional CT scan of the module that clearly shows the wiring and components: transistors, diodes, resistors, and capacitors. From these images, I could determine the circuitry of this flip flop module.

A 3-D scan of the module showing the circuitry inside the compact package. This image uses the blue color map. Click this image (or any other) for a larger version.

The photo below shows the module, a block of plastic 1.5 inches long with 13 pins. I could determine most of its functionality by probing it on a breadboard—conveniently, the pin spacing is compatible with standard solderless breadboards. The module is a flip flop (as the FF label suggests) but some questions remained. Last month, I reverse-engineered a simpler Motorola module (post) using 2-D X-rays. However, this flip flop module was much more complex and I couldn't reverse-engineer it from standard X-rays.

The Motorola LP FF module. It is a 13-pin block.

Fortunately, a company called Lumafield offered to take 3-D X-rays with their Neptune CT scanner. This 6-foot wide unit has a turntable and an X-Y-Z positioning mechanism inside. You put an item on the turntable and the unit automatically takes X-rays from hundreds of different angles. Cloud software then generates a 3-D representation from the X-rays. This industrial system is aimed at product development, product analysis, quality checking, and so forth. It handles metal components, soft goods such as shoes, plastic items, and complex assemblies. I think this is the first time it's been used for 1960s electronics, though.

The Lumafield CT X-ray machine. Photo courtesy of Lumafield.

A simple web-based interface (below) lets you manipulate the representation by rotating and slicing it with your touchpad or mouse. In this screenshot, I'm adjusting the clipping box by sliding the red, green, and blue squares. This yields a cross-section of the module (purple). You can look at the flip flop module yourself at this link; give it a minute to load.

Screenshot of the Lumafield web interface.

Background on the module

To ensure a successful Moon mission, all the systems of Apollo were thoroughly tested on the ground before flight. These Motorola modules were used in test equipment for One box onboard the spacecraft was the Up-Data Link,2 tested by the "Up-Data Link Confidence Test Set" shown below. Unfortunately the test box had no documentation, so I had to reverse-engineer its functionality.

The up-data test box is a heavy rack-mounted box full of circuitry. The wiring on top is for our reverse-engineering, plugged into the box's numerous test points.

The test box was constructed from 25 printed-circuit boards, with the boards connected by a tangled backplane of point-to-point wiring. Each board held up to 15 tan Motorola modules, blocks that look a bit like relays but contain electronic circuitry. The photo below shows one of the boards.

One circuit board from the test box. It has 15 modules including four LP FF modules.

You might wonder why complex electronics would be built from modules instead of integrated circuits. The invention of the integrated circuit in 1958 led to an electronic revolution, but in the mid-1960s integrated circuits were still expensive and rare. An alternative was small hybrid modules that functioned as building blocks: logic gates, flip flops, op-amps, and other circuits. Instead of a silicon chip, these hybrid modules contained discrete transistors, resistors, capacitors, and other components.

The components inside the module

The CT scan (below) provides a high-resolution module of the module, its components, and the wiring. The scan reveals that the module is constructed from two boards, one at the top and one at the bottom, with components mounted vertically, a technique known as cordwood construction. This technique was used in the 1960s when dense packing of components was required, with the cylindrical components stacked together like wooden logs. Unexpectedly, the wiring isn't a printed circuit board (like the previous module that I examined), but spot-welded ribbon wiring. (Note that the wire contacts the side of each pin or lead.) The 13 pins pass vertically through the module, with connections at the top and bottom; the scan shows the shape of each pin in detail.

CT scan of the Motorola LP FF module. In this image, I've used the grayscale color scheme.

The module contains two NPN transistors, mounted upside down with wires attached to the pins. The transistors are in metal cans, which show up clearly in the X-rays. The small square tab sticking out from a transistor indicates the emitter pin. For the transistor on the right, the tiny silicon die is visible between the pins. The die is connected to the pins by bond wires, but the bond wires are too small to be visible in the X-ray.

Two transistors in the module.

Some components aren't as easy to recognize, such as resistors. A carbon composition resistor is constructed from a resistive carbon cylinder, as shown in the cross section. A metal pin sticks into each end of the cylinder, providing the resistor's leads. The carbon doesn't block X-rays, so it is invisible. Thus, a resistor looks like two dangling metal pins in the scan.

X-ray of a carbon composition resistor and a cross-section of a similar (but not identical) resistor. Photo from the book Open Circuits, Copyright Eric Schlaepfer and Windell Oskay; used with permission of the authors.

A carbon film resistor, in contrast, is constructed from a spiral of carbon film on a ceramic rod. The carbon and ceramic don't show up in the scan, but the resistor's end-caps are visible. Thus, the two types of resistors appear different in the images. The module uses both types of resistors; I'm not sure why.

X-ray of a carbon film resistor and a photograph of a similar resistor. The spiral cut in the carbon film controls the resistance. Photo from the book Open Circuits, Copyright Eric Schlaepfer and Windell Oskay; used with permission of the authors.

The module contains many diodes and the internal structure of the diode is visible on the scan. A diode is constructed from a semiconductor die, with a metal S-shaped spring making contact with one side of the die. For some reason, the spring is much more visible in Zener diodes; I assume the spring happens to be made from a more radio-opaque metal.

X-ray slice through a diode, a Zener diode, and a cross-section of a diode. Photo from the book Open Circuits, Copyright Eric Schlaepfer and Windell Oskay; used with permission of the authors.

With careful examination, the diode's die can be seen in the scan as a bright spot at one side of the spring. This reveals the orientations of the diode, which is important for creating a schematic. The two diodes below have opposite orientations: the left one has the die on the top, while the right one has the die on the bottom.

Two diodes in the scan. The first diode has the die at the top, while the second has the die at the bottom.

The module's final components are capacitors, probably silver-mica capacitors. As shown in the cross-section, the capacitor consists of layers of foil and mica. These layers are too thin to show up on X-ray, but the rectangular connections to the leads are visible. Thus, a capacitor looks like rectangles attached to pins.

X-ray of a silver-mica capacitor and a cross-section of a similar capacitor. Photo from the book Open Circuits, Copyright Eric Schlaepfer and Windell Oskay; used with permission of the authors.

The cross-section image below shows a horizontal slice through the module. Since the components are mounted vertically as cordwood, this cuts through the components. The pins at the top and bottom are bright cyan. The blue circles are diodes. The more ghostly circles are resistors. The large hollow circles in the center are the transistors, on top of the capacitors.

A cross-section through the components.

It is easy to extract the wiring from the reconstruction.3 By defining a bounding box in the user interface, I obtained the top wiring layer as a slice, separated from the other circuitry. This view also makes it clear that the wiring is spot-welded to the sides of the pins, and not a printed-circuit board. At the bottom left, you can see where two wires have been welded together.

The top wiring layer in the module.

The wiring on the bottom of the module can be extracted similarly by changing the slice bounds in the user interface. I used a different color map for this image.

The bottom wiring of the board.

By studying the CT scan, I could reverse-engineer the circuitry. The hardest part was examining the diodes closely to determine their orientation. The resulting schematic is shown below (click for a larger version).

Schematic of the flip-flop module.

The core of the flip flop is the two cross-coupled transistors in the center: the output of one transistor is connected (through diodes) to the input (base) of the other. If one transistor is on, it forces the other transistor off. Thus, the flip flop has two stable states with one transistor on and one transistor off. In the remainder of the post, I'll explain the circuit in more detail.

How a J-K flip flop works

A flip flop is a circuit that can be put into two states, outputting a 0 or a 1. A flip flop has many uses, such as storing a bit, providing a delay, implementing a counter, or dividing a frequency by 2. A flip flop is controlled by a clock signal, changing state at the moment when the clock signal switches. (Flip flops often also have asynchronous inputs: Set and Reset inputs that act immediately, regardless of the clock.)

Several different types of flip flops are used for different purposes. A T (toggle) flip flops simply switches from 0 to 1, or 1 to 0, on each clock pulse, dividing the clock frequency by 2. A D (data) flip flop takes a data bit as input, storing it when the clock pulses. The J-K flip flop, however, is a general-purpose flip flop, with its function selected by the J and K control inputs. Its action is defined by the following table.

J	K	Output on clock pulse
0	0	Q (no change)
0	1	0 (clear)
1	0	1 (set)
1	1	Q' (toggle)

Diode-transistor logic NAND gate

The flip flop is constructed from diode-transistor logic NAND gates. The NAND gate has two inputs, isolated from each other by diodes. If both inputs are high, the transistor's base is pulled high by the first resistor. This turns on the transistor, pulling the output low.

With a 1 for both inputs, the transistor turns on, producing a 0 output.

Conversely, if one input (or both) is low, the current passes through the diode and the transistor's base is pulled low. The transistor turns off and the output resistor pulls the output high. Thus, the output is low when both inputs are high, and otherwise high, so the circuit implements a NAND gate.4

With a 0 input, the transistor is turned off, producing a 1 output.

Since this gate uses diodes and a transistor, it is called diode-transistor logic. This logic family was popular in the 1960s, until it was replaced by transistor-transistor logic (TTL). TTL uses a transistor in place of the input diodes, providing better performance.

Cross-coupling two NAND gates produces a simple latch, the Set-Reset latch. When one NAND gate is off, it forces the other gate on. Thus, the circuit has two stable states. Pulling the set' line low forces the output low, while pulling reset' low forces the output high. NAND-gate latches are very common circuits, storing one bit.

Cross-coupling two NAND gates creates a latch.

Understanding the flip flop circuit

The difference between a flip flop and a latch (by a common definition) is that a latch changes state as soon as an input changes, but a flip flop only changes state when triggered by a clock signal. In this section, I'll explain how the clock is implemented in the flip flop module, controlled by the J-K functionality.

The underlying idea is that the clock input is connected through capacitors, so a sharp negative edge on the clock briefly pulls a transistor's base low, turning off the transistor and switching that output high. This makes the flip flop edge-sensitive.

The schematic below shows one-half of the flip flop, omitting the earlier cross-coupled latch circuitry (shown as "feedback"). If the capacitor is charged as shown, then a negative clock pulse (arrow) will pull the capacitor negative, briefly shutting off the transistor and turning on the output Q.5 The latch circuitry will then keep the flip flop in the new state.

When the clock goes low, this can pull the transistor base low, turning the transistor off.

The conditions for the capacitor to charge are that J must be high and Q must be low. Otherwise the capacitor will block the clock pulse.6 In other words, if J is high and Q is low, the output will toggle high on the clock pulse. In the mirror-image circuit (not shown), if K is high and Q' is low, the complemented output will toggle high on the clock pulse. This is the desired behavior for a J-K flip flop.7

The reverse-engineering solves one mystery about the flip flop. When I probed the module on a breadboard, touching a ground wire to the J pin immediately set the flip flop. This is very strange behavior because the J and K inputs are supposed to be controlled by the clock. Moreover, a high (not low) J input should set the output. (And conversely with K.) Looking at the reverse-engineered schematic, though, explains that a sharp pulse on the J pin will act like the clock, sending a pulse through the capacitor, turning off the transistor, and causing a high output. I assume this behavior is not intentional, and J inputs are expected not to transition as sharply as when I touched it with a ground wire.8

Conclusion

I was impressed by the quality of the CT scan. It not only provided a crystal-clear view of the components and wiring, but even showed the internal structure of the components. Being able to see inside a module is like having X-ray vision. (That sounds redundant since it literally is X-rays, but I don't know a better way to describe it.) If you have an application that requires looking inside, I give Lumafield a thumbs-up.

For more background on the Up-data Test Box, I have some Twitter threads: power-up, modules, paper tape reader, and clock circuit. Also see CuriousMarc's video on the box:

I announce my latest blog posts on Twitter, so follow me @kenshirriff for updates. I also have an RSS feed. Many thanks to Lumafield and especially Jon Bruner for performing the CT scan of the module. Thanks to Marcel for providing the Up-Data Link Test Box, which contains the modules, and thanks to John McMaster for earlier X-rays. Cross-section photos copyright Windell Oskay and Eric Schlaepfer, from the upcoming book Open Circuits, which you should check out.

Notes and references

1. Presumably the Motorola modules have documentation somewhere, but we have been unable to find anything. I haven't been able to find even a mention of these modules, let alone details. ↩

2. NASA could send digital messages to the spacecraft from the ground. These data messages could perform specific tasks: control spacecraft equipment by activating relays, send commands directly to the Apollo Guidance Computer, or even set the spacecraft's clock. Onboard the Command Module, these messages were decoded by the Up-Data Link, a drab bluish box (below) mounted in the equipment bay.

   

   The Up-Data Link (UDL) was installed on the Apollo Command Module.

    ↩

3. For the simpler -3.9V module, I extracted the wiring from traditional 2-dimensional X-rays and it was a pain. Cordwood construction has two layers of wiring, at the top and the bottom, so an X-ray from the top merges the two wiring layers together. The side views are even worse, since you can't see the wiring at all. You need to take X-rays of the module at an angle to separate the wiring layers, but there's still overlap, not to mention obstruction from the components. ↩

4. The use of a Zener diode in the gate is a bit unusual. It acts as a level-shifter, raising the input voltage threshold that switches between off and on. (Otherwise the threshold is close to 0 volts, making the inputs too sensitive to noise.) I've found a patent that uses Zener-Coupled Diode Transistor Logic, which is somewhat similar. High Threshold Logic also uses Zener diodes to raise the threshold voltage. ↩

5. You might wonder how the flip flop ends up in the right state during a clock pulse, because there will be a moment when both transistors are turned off and both outputs go high. This seems like a metastable race condition. However, the key is that the feedback path is weaker than the clock pulse. Thus, the transistor on the side without the clock pulse will get turned on by the feedback, while the transistor on the side with the clock pulse remains off. This immediately breaks the symmetry, putting the flip flop into the right state. ↩

6. For the clock pulse to pass through the capacitor, the capacitor must be charged with the input side positive and the base side negative. Then, a negative clock pulse will pull the capacitor negative. However, if both sides of the capacitor are negative, the clock pulse will have no effect. Conversely, if both sides of the capacitor are positive, the clock pulse will pull the capacitor down, but not far enough to turn off the transistor. ↩

7. To understand the J-K action of the flip flop, I've reorganized the standard J-K function table to highlight the state changes.

   J	K	Output if Q is low	Output if Q is high
   0	0	0 (no change)	1 (no change)
   0	1	0 (no change)	0 (clear)
   1	0	1 (set)	1 (no change)
   1	1	1 (set)	0 (clear)

   In other words, if Q is low and J is 1, the flip flop is set. If Q is high and K is 1, the flip flop is cleared. Otherwise, the state remains unchanged. The implementation of the flip flop directly matches this logic. ↩

8. I found that the clock pulse must have a very sharp transition in order to work; my cheap pulse generator wasn't sufficient to act as the clock until I added a buffer transistor. The clock pulse needs to have enough drive current to rapidly discharge the capacitor. If it's too slow, the pulse won't be enough to turn off the transistor. ↩

Reverse-engineering the LM185 voltage reference chip and its bandgap reference

Many circuits, such as a computer power supply or a phone charger, require a stable voltage reference, but it's harder than you might expect to keep a voltage stable when the temperature changes. One integrated circuit that does this is the LM185.1 I looked at the die of this chip and found some interesting features. The same silicon die is used for three different integrated circuits, using tiny internal fuses to change its functionality. The chip uses a special circuit called the bandgap reference to keep the voltage stable even if the temperature changes. In this blog post, I'll discuss the circuitry of the LM185 and its implementation in silicon.

Composite die photo of the LM185. Click this (or any other) image for a larger version.

The photo above shows the LM185 die under the microscope, a tiny square of silicon. The underlying silicon is blue-gray, while the metal wiring on top is orangish. Regions of the silicon are doped with various impurities to form the transistors, resistors, and other devices on the chip. The variations in doping are visible as slight color changes in the silicon. At the top is the National Semiconductor logo.

The LM185 is available in three variants. The LM185-ADJ is the adjustable voltage reference. It has three pins: one is a feedback pin that controls the voltage. The LM185-1.2-N is a two-pin device, called a "micropower voltage reference diode". It is similar to a Zener diode providing 1.235V, but with better performance. (Lower power consumption, less noise, and better stability.) Finally, the LM185-2.5-N provides a 2.5V reference. The three variants are based on the same silicon die. The latter two have the feedback wired internally to provide a fixed voltage rather than an adjustable voltage.

The next sections describe how the various components of the chip are fabricated from silicon, and how they appear on the die.

NPN transistors

The photo below shows a closeup of one of the transistors in the LM185. The black lines and slightly different tints in the silicon indicate regions that have been doped to form N and P regions. The whitish areas are the metal layer of the chip on top of the silicon—these form the wires connected to the collector, emitter, and base.

Structure of an NPN transistor on the die. I edited the transistor layout so a cross-section would work.

Underneath the photo is a cross-section drawing illustrating how the transistor is constructed. There's a lot more than just the N-P-N sandwich you see in books, but if you look carefully at the vertical cross-section below the 'E', you can find the N-P-N that forms the transistor. The emitter (E) wire is connected to N+ silicon. Below that is a P layer connected to the base contact (B). And below that is an N+ layer connected (indirectly) to the collector (C).

The output transistor (below) is much larger than the other transistors and has a different structure in order to support the chip's high-current output. It has multiple interlocking "fingers" for the emitter and base, surrounded by the large collector.

A large, high-current NPN output transistor in the LM185 chip. The collector (C), base (B) and emitter (E) are labeled.

PNP transistors

You might expect PNP transistors to be similar to NPN transistors, just swapping the roles of N and P silicon. But for a variety of reasons, PNP transistors have an entirely different construction. They consist of a small circular emitter (P), surrounded by a ring-shaped base (N), which is surrounded by the collector (P). This forms a P-N-P sandwich horizontally (laterally), unlike the vertical structure of the NPN transistors.

The diagram below shows one of the PNP transistors in the LM185, along with a cross-section showing the silicon structure. Note that although the metal contact for the base is on the edge of the transistor, it is electrically connected through the N and N+ regions to its active ring in between the collector and emitter.

A PNP transistor in the LM185 chip. Connections for the collector (C), emitter (E) and base (B) are labeled, along with N and P doped silicon. The base forms a ring around the emitter, and the collector forms a ring around the base.

Resistors

Resistors are a key component of analog chips. Unfortunately, resistors in ICs are large and inaccurate; the resistances can vary by 50% from chip to chip. Thus, analog ICs are designed so only the ratio of resistors matters, not the absolute values, since the ratios remain nearly constant. The photo below shows two paralleled resistors. Other resistors have a zig-zag shape to fit a longer resistor into the available space.

A resistor inside the LM185 chip. The resistor is a strip of P silicon between two metal contacts.

Capacitors

A capacitor consists of a metal plate on top of silicon, separated by a thin oxide layer that acts as a dielectric. Capacitors are fairly large on integrated circuits; they are the most visible components on this die. The capacitor below contains multiple circular patterns. These may be doped silicon regions, where the junction between two regions provides additional capacitance.

A capacitor on the die.

Fuses

Fuses allow the circuitry of the chip to be changed after manufacturing. The LM185 uses fuses for two reasons. First, fuses can add or remove resistance, allowing the circuit to be tuned for higher performance. Second, a fuse changes the feedback circuitry between the LM185-1.2-N and LM185-2.5-N variants. (The LM185-ADJ version requires more changes than are supported by fuses, so it needs some changes to the metal layer. For instance, it has three pads connected instead of two.)

A fuse has two metal pads attached. Before the chip is packaged, probes can contact the pads and apply a high current to blow the fuse. The first type of fuse is implemented with a tiny strip of metal that is vaporized to break the circuit, just like a large-scale fuse. The second type of fuse is an "antifuse", which has the opposite behavior: it does not conduct until a high current is applied, at which point it becomes conductive. The antifuse can be built from a Zener diode, and the process of shorting it out is called a "Zener zap". The high current forms metal spikes through the junction, causing it to permanently conduct. The diagram below shows a fuse and an antifuse as they appear on the die.

A fuse and an antifuse on the die (I think). The contacts originally had more metal, but I used acid to clean gunk off the die and it dissolved some of the metal.

IC circuit: The current mirror

There are some subcircuits that are very common in analog ICs, but may seem mysterious at first. The current mirror is one of these. The idea is you start with one known current and then you can "clone" multiple copies of the current with a simple transistor circuit, the current mirror.

The following circuit shows how a current mirror is implemented with three identical transistors.2 A reference current passes through the transistor on the right. (In this case, the current is set by the resistor.) Since all the transistors have the same emitter voltage and base voltage, they source the same current, so the currents on the left match the reference current.

Current mirror circuit. The currents on the left copy the current on the right.

A common use of a current mirror is to replace resistors. As explained earlier, resistors inside ICs are both inconveniently large and inaccurate. It saves space to use a current mirror instead of multiple resistors whenever possible. Also, the currents produced by a current mirror are nearly identical, unlike the currents produced by two resistors.

Interactive chip explorer

To illustrate how the components form the chip, the die photo and schematic below are interactive. Click on a component in the die or schematic, and a brief explanation of the component will be displayed.

Click the die or schematic for details...

Because the three variants of the LM185 are slightly different, I had to combine three schematics to form the schematic above. Red components are only in the LM185-ADJ, green components are in the LM185-1.2-N, blue components are in the LM185-2.5-N, and cyan components are in the latter two chips. Note that the primary difference is the feedback circuit, but there are additional differences as well.

How a bandgap reference works

The main problem with producing a stable voltage from an IC is that the chip's parameters change as temperature changes. The bandgap voltage reference is commonly used to create a temperature-independent voltage reference.5 The trick is that it has one voltage that goes down with temperature and another than goes up with temperature. If you combine them correctly, you get a voltage that is stable with temperature.

To create a voltage that goes down with temperature, you can put a constant current through the transistor and look at the voltage between the base and emitter, called V_be. The graph below shows how this voltage drops as the temperature increases. At the left, the line hits the bandgap voltage of silicon, about 1.2 volts; this will be important later.

Vbe vs temperature for a transistor

If you set up a second transistor this way but with a lower current3, you get the same effect but the voltage V_be curve drops faster. This may not seem helpful since we need a voltage that goes up with temperature. But here's the trick: if you subtract the two V_be voltages, the difference increases as temperature increases, since the lines get farther apart. The difference is called ΔV_be. The graph below shows the V_be curves for two different transistors, and you can see how the difference ΔV_be between the curves increases with temperature, even though both curves decrease with temperature.

Voltages in a bandgap reference: Vbe for two transistors as temperature changes.

The final step to a bandgap reference is to combine V_be and ΔV_be in the right ratio so the result is constant with temperature. It turns out that if the values sum to the bandgap voltage of silicon (approximately 1.2 volts), the drop in V_be and the increase in ΔV_be cancel out. In the graph below, adding 10 copies of ΔV_be is the right ratio; the exact ratio depends on the particular transistors. The important thing to notice in the graph below is that as the temperature changes, V_be+nΔV_be remains constant - the top of the blue ΔV_be line remains at the bandgap voltage.

By adding multiples of ΔVbe to Vbe, the bandgap voltage is reached regardless of temperature.

In the LM185, the key transistors are Q10 and Q11, where Q10 has 10 emitters in parallel, so each has 1/10 the current. Thus, if you feed the same current into both transistors, Q10 has a lower V_be voltage than Q11 as described above. Note that Q10 is split in two: one half above Q11 and one half below Q11. This layout minimizes potential error due to a temperature gradient across the die. Half of Q10 will be hotter than Q11 and half will be cooler, so the difference will cancel out.

Transistors Q10 and Q11 are the key to the bandgap reference. Q10 has 10 emitters, so each has 1/10 the current as Q11.

The diagram below shows how the bandgap reference is implemented in the LM185. Transistors Q10 and Q11 have different V_be voltages due to their relative sizes. The difference in these voltages (ΔV_be) is developed across R7. Since the same current flows through R6, R7, and R8, the voltage across R6 will be 4ΔV_be and the voltage across R8 will be 6ΔV_be by Ohm's law. Thus, the combination of R6, R7, and R8 multiply ΔV_be by 11. Meanwhile, Q14 has its own V_be.

The bandgap circuit in the LM185.

Summing the voltages along the right gives V_be + 11ΔV_be, which is designed to match the temperature-stabilized bandgap voltage of 1.2 volts. Thus, the circuit will be balanced4 if the voltage between the feedback input and V+ is 1.2 volts. If the voltage is not 1.2 volts, Q10 and Q11 will pass different amounts of current. Since the current mirror (Q12 and Q13) attempts to feed the same current into Q10 and Q11, any discrepancy will appear as current at the error output. This error current is amplified and controls the output transistor, adjusting the voltage until the feedback voltage is brought back into compliance. Thus, the circuit maintains the desired voltage, stabilized even if the temperature changes.

Conclusion

Well, that turned into a longer blog post than I was expecting. Although the LM185 doesn't contain many components by modern standards, it provides a stable, regulated voltage reference. It has some interesting features such as the use of fuses both to improve performance and to sell variant chips. It also illustrates the principle of the bandgap voltage regulator.

I announce my latest blog posts on Twitter, so follow me @kenshirriff. I also have an RSS feed. Thanks to Mitch Wright for supplying the chip.

Notes and references

1. The LM185, LM285, and LM385 are the same chip, but with different temperature ranges. The LM185 is rated for the military temperature range: -55°C to 125°C. The LM285 is rated for the automotive temperature range: -40°C to 85°C. The LM385 is rated for the standard temperature range: 0°C to 70°C. I believe the chips are identical except for testing. For the purposes of this post, you can treat the three chips as identical. ↩

2. For more information about current mirrors, check Wikipedia or chapter 3 of Designing Analog Chips. ↩

3. When building a bandgap reference, what really matters for V_be is the current density through the transistors - the current divided by the area of the emitter. Decreasing the current through the transistor decreases the current density. The second way to decrease current density is to use a larger transistor with a larger emitter. Often five or ten identical transistors in parallel will be combined to form this large transistor to ensure the large transistor and the small transistor are exactly matched. ↩

4. One tricky thing about the bandgap circuit is that it is implemented "backward", taking the voltage as an input. The chip's block diagram6 shows that the reference generates 1.2 volts and this is compared to the input voltage. But in reality, the input voltage is fed into the bandgap circuit. If the input is 1.2 volts, the circuit is balanced. But if the input is too high or too low, the bandgap circuit will be unbalanced with more current through one transistor than the other. This "error" signal is amplified and used as feedback to adjust the input voltage until it matches 1.2 volts. In other words, there's no 1.2-volt reference inside the chip. Instead, the chip and its external input form a feedback loop that generates 1.2 volts. ↩

5. I've written before about bandgap references, specifically the 7805 voltage regulator and the TL431. ↩

6. The TL431 is a popular voltage reference, used in many power supplies. The main difference is that the LM185 regulates the voltage relative to the positive side, while the TL431 regulates the voltage relative to the negative side.

   

   Comparison of the LM185 and TL431 block diagrams, from the datasheets.

    ↩